{"id":1752,"date":"2017-03-31T16:10:37","date_gmt":"2017-03-31T08:10:37","guid":{"rendered":"http:\/\/pemsic.eee.nagasaki-u.ac.jp\/?p=1752"},"modified":"2021-10-11T00:25:11","modified_gmt":"2021-10-10T15:25:11","slug":"full-paper-dr-hariya-circuit-design-techniques-for-reducing-the-effects-of-magnetic-flux-on-gan-hemts-in-5-mhz-100-w-high-power-density-llc-resonant-dc-dc-converters","status":"publish","type":"post","link":"https:\/\/pemsic.eee.nagasaki-u.ac.jp\/?p=1752","title":{"rendered":"Full Paper: Dr. Hariya Circuit Design Techniques for Reducing the Effects of Magnetic Flux on GaN-HEMTs in 5-MHz 100-W High Power-Density LLC Resonant DC\u2013DC Converters"},"content":{"rendered":"<p><a href=\"http:\/\/ieeexplore.ieee.org\/document\/7588069\/\" target=\"_blank\" rel=\"noopener\">Circuit Design Techniques for Reducing the Effects of Magnetic Flux on GaN-HEMTs in 5-MHz 100-W High Power-Density LLC Resonant DC\u2013DC Converters<\/a><br>\nAkinori Hariya ; Tomoya Koga ; Ken Matsuura ; Hiroshige Yanagi ; Satoshi Tomioka ; Yoichi Ishizuka ; Tamotsu Ninomiya<\/p>\n<p>Abstract:<\/p>\n<p>This paper presents circuit design techniques for reducing the effects of magnetic flux, occurred from the planar transformer, on gallium nitride high-electron-mobility transistors (GaN-HEMTs) in 5-MHz 100-W high power-density LLC resonant dc\u2013dc converters. For investigating the effects of magnetic flux on a GaN-HEMT, power device model for finite element method (FEM) simulation is proposed. In order to confirm the validity of the model, the quantitative evaluation is conducted with FEM simulation, and experiment using evaluation boards. Moreover, the optimization of printed circuit board layout is considered using the verified model with FEM simulation, for reducing the effects of magnetic flux on GaN-HEMTs while reducing the area of converter. In the experiments, 5-MHz 48&nbsp;V\/12&nbsp;V 100&nbsp;W unregulated LLC resonant dc\u2013dc converter with efficient power conversion GaN-HEMTs is built as the prototype to verify the optimized layout. The maximum power efficiency can be achieved 91.28%, and the power density can be achieved 32&nbsp;W\/cm3.<\/p>\n<p>Published in: IEEE Transactions on Power Electronics ( Volume: 32, Issue: 8, Aug. 2017 )<br>\nPage(s): 5953 &#8211; 5963<\/p>\n<p>Date of Publication: 11 October 2016<\/p>\n<p>ISSN Information:<br>\nPrint ISSN: 0885-8993<br>\nOnline ISSN: 1941-0107<br>\nDOI: 10.1109\/TPEL.2016.2616439<br>\nPublisher: IEEE<br>\nSponsored by: IEEE Power Electronics Society<\/p>\n<p>IEEE Keywords<\/p>\n<p>Magnetic flux, Copper, DC-DC power converters, Finite element analysis, Magnetic noise, Magnetic shielding, Integrated circuit modeling<\/p>\n<p>Author Keywords<br>\nplanar transformer, Finite element method (FEM), gallium nitride high-electron-mobility transistor (GaN-HEMT), high power-density dc\u2013dc converter, MHz-level switching frequency<\/p>\n\n\n<a href=\"https:\/\/www.scimagojr.com\/journalsearch.php?q=26055&amp;tip=sid&amp;exact=no\" title=\"SCImago Journal &amp; Country Rank\"><img decoding=\"async\" border=\"0\" src=\"https:\/\/www.scimagojr.com\/journal_img.php?id=26055\" alt=\"SCImago Journal &amp; Country Rank\"  \/><\/a>\n","protected":false},"excerpt":{"rendered":"<p>Circuit Design Techniques for Reducing t&#8230; <a class=\"more-link\" href=\"https:\/\/pemsic.eee.nagasaki-u.ac.jp\/?p=1752\">Continue Reading &rarr;<\/a><\/p>\n","protected":false},"author":1,"featured_media":1754,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"jetpack_post_was_ever_published":false,"_jetpack_newsletter_access":"","_jetpack_dont_email_post_to_subs":true,"_jetpack_newsletter_tier_id":0,"_jetpack_memberships_contains_paywalled_content":false,"_jetpack_memberships_contains_paid_content":false,"footnotes":"","jetpack_publicize_message":"","jetpack_publicize_feature_enabled":true,"jetpack_social_post_already_shared":true,"jetpack_social_options":{"image_generator_settings":{"template":"highway","default_image_id":0,"font":"","enabled":false},"version":2}},"categories":[4],"tags":[14,21,60,30,33],"class_list":["post-1752","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-published","tag-akinori-hariya","tag-gan","tag-llc","tag-tamotsu-ninomiya","tag-yoichi-ishizuka"],"jetpack_publicize_connections":[],"jetpack_featured_media_url":"https:\/\/i0.wp.com\/pemsic.eee.nagasaki-u.ac.jp\/wp-content\/uploads\/2017\/04\/8c44d4eceef92dbf5704a3a2f5e9ebda.jpg?fit=1650%2C2200&ssl=1","jetpack_sharing_enabled":true,"jetpack_shortlink":"https:\/\/wp.me\/p6WRmG-sg","jetpack-related-posts":[{"id":1199,"url":"https:\/\/pemsic.eee.nagasaki-u.ac.jp\/?p=1199","url_meta":{"origin":1752,"position":0},"title":"Presentation: Hariya, Reduction Technique of Leakage Flux Effects on GaN-HEMTs in 5 MHz \/ 100 W Isolated DC-DC Converters, APEC 2016, Mar. 24, 2016","author":"isy","date":"02\/06\/2016","format":false,"excerpt":"Thank you for dropping by! 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